Toshiba Corporation has announced the prototype of a new FeRAM -Ferroelectric Random Access Memory-that redefines industry benchmarks for density and operating speed. The new chip realizes storage of 128-megabits1 and read and write speeds of 1.6-gigabytes a second* , the most advanced combination of performance and density yet achieved** . Full details of the new FeRAM were presented at the International Solid-State Circuits Conference 2009 (ISSCC2009) in San Francisco, USA.

The new FeRAM modifies Toshibas original chainFeRAM TM architecture, which significantly contributes to chip scaling, with a new architecture that prevents cell signal degradation, the usual tradeoff from chip scaling. The combination realizes an upscaled FeRAM with a density of 128-megabit. Furthermore, a new circuit that predicts and controls the fluctuations of power supply supports high-speed data transfers. This allowed integration of DDR2 interface to maximize data transfers at a high throughput at low power consumption, realizing read and write speeds of 1.6 gigabytes a second. In developing the new FeRAM, Toshiba broke its own record of 32-megabit density and 200-megabites-a-second data transfers, pushing performance to eight times faster than the transfer rate of the previous records and the fastest speed of any non-volatile RAM.

FeRAM combines the fast operating characteristics of DRAM with flash memorys ability to retain data while powered off, attributes that continue to attract the attention of the semiconductor industry. Toshiba will continue R&D in FeRAM, aiming for further capacity increases and eventual use in a wide range of applications, including the main memory of mobile phones, mobile consumer products, and cache memory applications in products such as mobile PCs and SSDs.

Source: Toshiba